Many semiconductor circuits require the switching of high voltages. For example, non-volatile memory devices require voltages to erase and program the memory device that are significantly higher than the voltages needed for other device functions, such as reading data from the memory or communicating with other semiconductor circuits. Thus, semiconductor circuits often employ a voltage conversion circuit to provide the high voltage levels required by the non-volatile memory and other associated devices.
FIG. 1 illustrates a conventional high voltage conversion circuit 100. As shown in FIG. 1, the high voltage conversion circuit 100 receives a logical input signal (0 volts to VDD), input, and a voltage level, Vep, e.g., on the order of 3 to 12 volts. The logical input signal, input, may be set to a low logic value, for example, to pass the voltage level, Vep, to the output and to a high logic value to pass 0 volts to the output. Thus, the output of the high voltage conversion circuit 100 switches between 0 volts and the applied voltage level. Vep, depending on the value of the applied logical input signal. The feedback transistor MP4 gates the P-channel output transistor MP7 with the applied voltage level, Vep. In this manner, the transistor MP7 is turned off when the output is low. The N-channel output driver MXU1 is gated with a high voltage level, Vdd, to pass 0 volts to the output.
Gated diode breakdown is a well-known condition that can occur in a metal oxide semiconductor (MOS) transistor, such as the transistor MXU1 in FIG. 1, under certain conditions. FIG. 2 is a cross sectional view of the transistor MXU1 of FIG. 1. The gated diode breakdown condition occurs in the junction 210 between the N+drain and the P-substrate, when a high voltage is applied to the drain of the transistor MXU1 and the gate and substrate of the transistor MXU1 are grounded. The transistor MXU1 is off in this state, but the high voltage applied to the drain can cause the reverse biased diode from the drain to the P-substrate to break down (right under the gate where the field is the highest), causing an avalanche of current and impairing circuit operation.
The actual drain voltage at which gated diode breakdown will occur, referred to herein as Vbreakdown, depends on the transistor fabrication process. In one particular process, a drain voltage on the order of 10 volts has been observed to cause a gated diode breakdown. Thus, to avoid gated diode breakdown, the voltage applied to the drain must remain below the breakdown voltage, Vbreakdown, if the gate voltage is grounded. As previously indicated, however, in many semiconductor circuits, voltages greater than the breakdown voltage are needed. For example, the erase and program operations for non-volatile memories on a secure integrated circuit require voltage levels of 10 and 12 volts, respectively, on the high voltage power supply, Vep.
FIG. 3 illustrates a known technique for avoiding gated diode breakdown, for example, in high voltage conversion circuits, when the breakdown voltage, Vbreakdown, is less than the required high voltage level, Vep. The modified high voltage conversion circuit 300 includes a logical input signal, input, that operates in the same manner as the logical input signal, input, of FIG. 1 whereby a low logic value, for example, passes the voltage level, Vep, to the output and a high logic value passes 0 volts to the output. As shown in FIG. 3, the modified high voltage conversion circuit 300 places an additional P-channel transistor MP5 and MP8 in series with the existing P-channel transistors MP4 and MP7, respectively. In this manner, when the gate voltage applied to the existing transistors MP4 and MP7 is the high voltage level, Vep, another P-channel transistor MP5 or MP8, respectively, is placed in series so that the drain voltage on transistors MP4 and MP7 will not be pulled to ground. Rather, the drain to bulk voltage on transistors MP4 and MP7 will be pulled to a value below the breakdown voltage, Vbreakdown, i.e., approximately Vep minus (Vdd plus Vtp), where Vtp, is one P-channel threshold, since the transistor bulk has a voltage level of Vep for a P-channel transistor.
Similarly, the N-channel transistor MXU1 is protected from gated diode breakdown by placing an additional N-channel transistor MXU0 in series with the existing transistor MXU1. Transistor MXU0 is gated by Vdd, thus preventing the high voltage on the output from reaching the drain of MXU1 and limiting the drain voltage on transistor MXU1 to a value below the breakdown voltage, Vbreakdown. It is noted that Vdd on the gate of MXU0 also eliminates the gated-diode condition on MXU0 because the transistor is on with a channel formed under the gate.
While the modified high voltage conversion circuit 300 effectively prevents gated diode breakdown in the N-channel transistor, the modified high voltage conversion circuit 300 is only capable of switching between an output voltage of 0 volts and the high voltage level of 10 or 12 volts. For some applications, however, it is necessary, to switch between an output voltage of Vdd and the high voltage level of 10 or 12 volts, which is not possible with the cascaded transistor implementation shown in FIG. 3.
A need therefore exists for an N-channel protection circuit that prevents gated diode breakdown in N-channel transistors that have a high voltage on their drain, and provides greater flexibility on the output voltages that may be obtained. A further need exists for an improved N-channel protection circuit that prevents gated diode breakdown in N-channel transistors by dividing the high voltage such that no transistor has a drain voltage that exceeds the breakdown voltage, Vbreakdown.